Contents
- Course Details
- Course Summary
- Course Timetable
- Course Aims
- Student Learning Outcomes
- Assumed Knowledge
- Teaching Rationale
- Teaching Strategies
- Assessment
- Academic Honesty and Plagiarism
- Course Schedule
- Resources for Students
- Course Evaluation and Development
Course Details
| Course Code | COMP4601 |
| Course Title | Design Project B |
| Units of Credit | 6 |
| Course Website | http://cse.unsw.edu.au/~cs4601 |
| Handbook Entry | http://www.handbook.unsw.edu.au/undergraduate/courses/current/COMP4601.html |
Course Summary
COMP4601 is a team-based project development course involving the design and implementation of embedded and/or high performance and/or low power systems using FPGAs.
In 2017, teams will develop a solution to one of a number of suggested project problems. Project teams are expected to investigate possible approaches, develop their proposal, implement their design, present their solution, and to report on their investigation and implementation.
The course will involve lectures, seminars, lab exercises and project work. Lectures will provide the context for the problems being studied. Students will prepare and assess seminars on related research publications. Project teams will present the results of their investigations and developments.
Course Timetable
The course timetable is available here .
Course Aims
This course is expected to enhance research skills, sharpen design, implementation and presentation skills, allow students to explore solutions to open-ended problems, and provide opportunities to practice the rapid acquisition of new technical skills with state-of-the-art systems.
Student Learning Outcomes
By the end of this course, students should be able to:
- design and implement digital systems using configurable logic,
- be able to distinguish when purely processor-based, or when purely logic-based, or when heterogeneous approaches to solve computational problems are called for,
- explain and put into practice techniques for accelerating computation in hardware,
- independently study advanced techniques in digital design and implementation, and
- document and present their developments in a professional manner.
This course contributes to the development of the following graduate capabilities:
| Graduate Capability | Acquired in |
| scholarship: understanding of their discipline in its interdisciplinary context | Design & implementation tasks; Seminar |
| scholarship: capable of independent and collaborative enquiry | Design & implementation tasks; Team activities |
| scholarship: rigorous in their analysis, critique, and reflection | Design & implementation tasks; Presentation & documentation tasks; Lab exercises |
| scholarship: able to apply their knowledge and skills to solving problems | Design & implementation tasks |
| scholarship: capable of effective communication | Presentation & documentation tasks |
| leadership: enterprising, innovative and creative | Design & implementation tasks; Team activities |
| leadership: collaborative team workers | Team activities |
| professionalism: capable of independent, self-directed practice | Lab exercises; Design & implementation tasks |
| professionalism: capable of lifelong learning | Seminars |
| global citizens: culturally aware and capable of respecting diversity and acting in socially just/responsible ways | Team activities |
Assumed Knowledge
The formal pre-requisites for this course are COMP3211 and COMP3601.
It is assumed that, prior to taking this course, students:
- know a hardware description language,
- have experience programming an FPGA,
- have the background to architect solutions to computational problems,
- understand the concepts of sequential programming and know an imperative programming language such as C, and
- understand the purpose and structure of an operating system.
Teaching Rationale
Hardware design and systems prototyping using field-programmable gate arrays is increasingly important and supports a booming embedded systems and hardware accelerator industry. In order to develop essential skills and to be industrially relevant, Computer Engineering students need to gain experience designing and implementing systems and components using programmable logic devices. Increasingly, these devices include hard processors, and therefore require designers to consider the appropriate mix of hardware and software approaches. The background necessary to understand the design problem, processors and programmable logic technology will be outlined in classes. Students will work in teams to study and develop solutions using current methodologies to a computationally demanding and relevant problem.
Teaching Strategies
Formally, the course comprises three lecture hours and two lab
hours per week for 12 weeks. However, since this is a 4th year project course, there will be an emphasis on working informally with your team member(s) to design solutions to the chosen problem. It will also be expected that you may need to spend a good deal of time independently and/or jointly solving problems you encounter and trying to understand vaguely stated vital information.
The course and particular problems to be studied will be introduced in Weeks 1-4 via lectures. Early in this period, your team will choose the project you will work on. You will also choose a seminar paper to present and complete laboratory exercises to familiarise yourself with the hardware/software used in the course.
You will have the opportunity to select your team partner(s), to form teams of 2 or 3, and to select the project you will work on. It is hoped that these degrees of freedom will encourage strong and satisfying collaboration and enhance co-operation in acquiring necessary skills as well as in developing solutions.
Project teams are required to report on their progress as they develop solutions to the design challenges posed by their projects. A Project Plan is to be developed and presented to the class during Week 5 - a written plan will also be submitted at this stage. A Design Review involving a demonstration of progress and a report are due in Week 9. A Final Report, demonstration and presentation are due in Week 13. These formal reporting requirements encourage students to manage their project systematically and to plan their work. Regular feedback on the direction and approach being taken will be provided during the lab sessions in even numbered weeks.
A suite of laboratory exercises has been developed to facilitate the acquisition of the skills required to make use of the hardware/software provided in the course. At the completion of key lab exercise, students are expected to reflect upon their learning via a brief written report.
The course participants will study motivating problems during class and undertake practical tasks to gain an appreciation of the main concepts touched upon in the course, namely: hardware acceleration, hardware/software co-design, parallel architectures and reconfigurable systems design.
The preparation and presentation of seminars is intended to provide students with research experience, practice effective communications, and develop professional skills. Audience members are expected to participate in the discussion and to assess the presentation of the seminars.
At the completion of the course the lecturer will interview students to understand individual experiences.
Note: Given the complexity of teaching a group of students with diverse backgrounds and different projects, the lecturer may revise or take detours from the plans stated in this Course Outline in order to better achieve the course objectives.
Assessment
Assessment in this course will be based on the following:
| Week(s) | Criterion | Contribution |
| 2-13 | Individual project contribution | 20% i(individual) |
| 4 | Lab reports | 15% i |
| 5 | Project plan (presentation & report) | 10% T(eam) |
| 6-12 | Seminar presentation | 15% i |
| 6-12 | Seminar participation & assessment | 10% i |
| 9 | Design review (demonstration & report) | 10% T |
| 13 | Final project presentation, demonstration & report | 20% T |
Individual assessments will be based on individual efforts made to contribute to team successes, your learning, and ability to adapt to circumstances. Students will be interviewed on Friday 2 June.
Academic Honesty and Plagiarism
UNSW has an ongoing commitment to fostering a culture of learning informed by academic integrity. All UNSW staff and students have a responsibility to adhere to this principle of academic integrity. Plagiarism undermines academic integrity and is not tolerated at UNSW. Plagiarism at UNSW is defined as using the words or ideas of others and passing them off as your own.
If you haven't done so yet, please take the time to read the full text of
The pages below describe the policies and procedures in more detail:
Course Schedule
Lectures are scheduled to occur in Weeks 1-4 and as needed thereafter.
Teams will present and submit their Project Plan during Week 5. Individual discussions will be held with teams during the lab sessions in even-numbered weeks.
Students will commence lab work by Week 2 and submit reports on their impressions, implementations and suggestions by the end of Week 4.
During the lecture periods of Weeks 6-12, individual students will conduct seminars on recent research publications chosen during Weeks 1-2. Audience members are expected to participate in the discussion and to assess the presentation of the seminars.
A Design Review, involving a demonstration of progress and a report will occur in Week 9.
During the lecture and lab sessions of Week 13, teams will present and demonstrate their solutions to the problems they studied. A Final Report will also be submitted.
Students are required to attend an exit interview lasting approximately 10 mins on Friday 2 June (Week 13).
Resources for Students
There is no prescribed text for this course. However, students will need to refer to research papers, product data sheets, application notes, standards, system documentation, reference books and technical articles to gain the background needed to design and implement the project systems. Some of these references will be identified during the course. Please ask the lecturer for assistance if you are lost.
Course Evaluation and Development
Student feedback on this course will be obtained via electronic survey (CATEI) at the end of session and will be used to make improvements to the course. Students are encouraged to provide informal feedback during the session and to let the lecturer in charge know of any problems as soon as they arise. Every reasonable effort to address concerns will be made.
Students have commented that they enjoyed the in-depth exposure to reconfigurable technology and project experience gained in Design Project B. In 2017 we will examine the industry shift towards FPGA-based data centre accelerators. I have also reduced the reporting workload to address a concern raised by a few students. The Computer Support Group have implemented SSDs to improve the performance of the design software in the Lyre lab.
Resource created Thursday 09 February 2017, 02:47:16 PM, last modified Wednesday 12 April 2017, 07:20:32 PM.